The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC design and materials have produced generations of ICs where each generation has scaled down to smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing are needed. For example an optical proximity correction (OPC) technique is implemented in a mask fabrication. OPC employs a lithographic model to predict contours of the patterns after the lithography process. Before applying a correction, edges of the patterns are dissected into small segments and a target point is defined for each segment. Usually, several iterations are needed in order to achieve a convergence between the edge positions and the target points. A resolution limitation in lithography introduces rounding corners in the contours. A difference between the target point and rounding corner contour causes an unstable correction convergence, which results in a failure of pattern fidelity correction. It is desired to have improvements in this area.